Resume

Technical Skills


Tools:

  • RTL simulation
  • PCB schematic / place-route
  • SPICE, HyperLynx
  • Altera / Xilinx
  • Linux, Windows

HW / SW Design:

  • ASIC, FPGA, CPLD logic design
  • VHDL, Verilog, Bluespec
  • Altera OpenCL (HW generation)
  • C, C++, Java, Python, Perl, Mako
  • LLVM, clang
  • Pin, perf, gem5, zsim

Web Design:

  • PHP, JS, CSS, HTML
  • AWS
  • Adobe Creative Suite
  • MySQL, Oracle
  • WP plugins, themes

Work Experience


Centaur Technology (2015 – present)

CPU Performance Engineer (Intern)
HW Design: X86 logic design, CPU performance analysis, Pintool, CPU research.

ARM (Summer 2014)

Verification Engineer (Intern)
ARMv7 and v8: regression automation, debugging test platform and test generation.

General Dynamics C4 Systems (2008 – 2013)

Electrical Engineer II (full-time position)
Lead PCB design engineer
HW Design: full system design, PCB schematic / place & route, FPGAs, power design, simulation.

Freescale Semiconductor (Summer 2007)

Electrical Engineer (Intern)
HW Design: SRAM controller updates, received "Best Undergraduate Presentation" award.

Honeywell Aerospace (Summer 2006)

Engineer (Intern)
SW Design: web application to dynamically create flow charts / process maps.

Education


The University of Texas at Austin (2013 – present)

Degree:Ph.D. (pursuing), Computer Architecture
Coursework:Microarchitecture, Code generation, Performance Evaluation, Multicore computing, Parallel Computer Architecture.
Research:Simulating exascale computing systems for reliability / resiliency.
FPGA Accelerated Simulation Technologies (FAST): Loosely coupled, high-performance, cycle-accurate, hybrid HW/SW full-system simulator.

Harvard University (2009 – 2013)

Degree:S.M., Electrical / Computer Engineering
Coursework:Advanced computer architecture, VLSI.
Research:Computer Architecture: Superscalar Processors on FPGAs: Evaluating approaches, performance and use cases of existing FPGA implementations of superscalar processors.

Massachusetts Institute of Technology (2010 – 2012)

(Courses taken as part of my Harvard S.M. program)
Coursework:Complex digital systems (Bluespec), Power electronics, Feedback systems.

Northern Arizona University (2004 – 2008)

Degree:B.S., Electrical / Computer Engineering (Summa cum laude)
GPA:3.96 / 4.0
Coursework:VLSI, Advanced VHDL digital design, Embedded control systems.
Research:FPGA-based pseudo-random number generators (PRNG) and low-density parity check (LDPC) error-correcting codes (ECC).
Detect and approximate object boundaries within images using B-spline curves.
Awards:Research grants: NASA/Arizona Space Grant, Hooper Undergraduate Research Award.
NAU research symposiums: 1st place (elec. eng.), 3rd place (general eng.)
Scholarships: Science Dpt., John & Valerie Seeger, John Reske Mem., Wayland Edu. Fdn.

Personal Enrichment


Professional Memberships

IEEE Computer Society, IEEE Circuits and Systems

Missionary (2002-2004)

Two years of full-time, traveling, volunteer service and teaching.

Boy Scouts of America (1994 – present)

Eagle Scout rank, continue to serve in various capacities.